Reference Number IIT/SRIC/R/NGS/2026/109
Project Title Secure and Intelligent Indigenous Network Packet Processor on Field Programmable Gate Array with Hardware based Stateful Firewall for Real-time Intrusion Detection/Prevention
Temporary Position(s) Senior Research Fellow (SRF)
Number of vacancies 1
Consolidated Compensation Rs.
Coordinator / PI Rajat Subhra Chakraborty
Essential Qualification Post Graduate Degree in Basic Science OR Graduate / Post Graduate Degree in Professional Course selected through a process described through any one of the following: a. Scholars who are selected through NationalEligibility Tests - CSIR-UGC NET including lectureship (Assistant Professorship) and GATE. b. The selection process through National level examinations conducted by Central Government Departments and their Agencies and Institutions such as DST, DBT, DAE, DOS, DRDO, MoE, ICAR, ICMR, IIT, IISc, IISER, NISER etc. With two years of research experience
Desired Experience 1. M.Tech./M.E. in CS/CSE/IT/ECE/EE or related discipline. 2. VLSI design on FPGA/ASIC platform using Verilog/VHDL.
Upper Age Limit 32
Last Date 31-08-2026
Application Fees 0
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